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rdf:type
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Description
| - As the complexity of current hardware systems rises rapidly, it is a challenging task to harden these systems against faults and to complete their verification and manufacturing test. Not only that verification and testing take a considerable amount of time but the number of design errors, faults, manufacturing defects and crosstalks increases with the rising complexity as well. Furthermore, when a system is designed to be reliable new issues come into play making the picture even more complex. In this paper we performed a detailed analysis of two approaches devoted to verification of hardened systems, with respect to the test set generation: the first one is based on classical Automatic Test Pattern Generation, the second one on Constrained-random Stimulus Generation. We evaluated their qualities as well as their drawbacks and introduced few ideas about their combination in order to create a new promising approach for verification of reliable systems.
- As the complexity of current hardware systems rises rapidly, it is a challenging task to harden these systems against faults and to complete their verification and manufacturing test. Not only that verification and testing take a considerable amount of time but the number of design errors, faults, manufacturing defects and crosstalks increases with the rising complexity as well. Furthermore, when a system is designed to be reliable new issues come into play making the picture even more complex. In this paper we performed a detailed analysis of two approaches devoted to verification of hardened systems, with respect to the test set generation: the first one is based on classical Automatic Test Pattern Generation, the second one on Constrained-random Stimulus Generation. We evaluated their qualities as well as their drawbacks and introduced few ideas about their combination in order to create a new promising approach for verification of reliable systems. (en)
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Title
| - Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability
- Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability (en)
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skos:prefLabel
| - Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability
- Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability (en)
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skos:notation
| - RIV/00216305:26230/13:PU106327!RIV14-MSM-26230___
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
| - P(ED1.1.00/02.0070), P(LD12036), S, Z(MSM0021630528)
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/00216305:26230/13:PU106327
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
| - ATPG, funkční verifikace. (en)
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...v/mistoKonaniAkce
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http://linked.open...i/riv/mistoVydani
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http://linked.open...i/riv/nazevZdroje
| - IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...vavai/riv/projekt
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http://linked.open...UplatneniVysledku
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http://linked.open...iv/tvurceVysledku
| - Kotásek, Zdeněk
- Šimková, Marcela
- Bolchini, Cristiana
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http://linked.open...vavai/riv/typAkce
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http://linked.open.../riv/zahajeniAkce
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http://linked.open...n/vavai/riv/zamer
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number of pages
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http://purl.org/ne...btex#hasPublisher
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https://schema.org/isbn
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http://localhost/t...ganizacniJednotka
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