About: Towards Evolvable Systems Based on the Xilinx Zynq Platform

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Field programmable gate arrays (FPGAs) are considered as a good platform for digital evolvable hardware systems. Researchers introduced virtual reconfigurable circuits as the response to the insufficient support of partial reconfiguration in early FPGAs. Later, the features of FPGAs allowed the designers to develop evolvable systems fully exploiting native reconfiguration infrastructures. Xilinx recently introduced a new platform called Zynq-7000 all programmable (AP) system-on-chip (SoC) which has the potential to become the next revolutionary step in evolvable hardware design. The paper analyzes Zynq-7000 AP SoC from the perspective of an evolvable hardware designer. Several scenarios are described of how to implement evolvable systems on a developmental board equipped with this programmable SoC. These scenarios are evaluated in terms of area overhead, execution time, reconfiguration time and throughput. The resulting observations should be useful for those who are going to develop real- Field programmable gate arrays (FPGAs) are considered as a good platform for digital evolvable hardware systems. Researchers introduced virtual reconfigurable circuits as the response to the insufficient support of partial reconfiguration in early FPGAs. Later, the features of FPGAs allowed the designers to develop evolvable systems fully exploiting native reconfiguration infrastructures. Xilinx recently introduced a new platform called Zynq-7000 all programmable (AP) system-on-chip (SoC) which has the potential to become the next revolutionary step in evolvable hardware design. The paper analyzes Zynq-7000 AP SoC from the perspective of an evolvable hardware designer. Several scenarios are described of how to implement evolvable systems on a developmental board equipped with this programmable SoC. These scenarios are evaluated in terms of area overhead, execution time, reconfiguration time and throughput. The resulting observations should be useful for those who are going to develop real- (en)
Title	Towards Evolvable Systems Based on the Xilinx Zynq Platform Towards Evolvable Systems Based on the Xilinx Zynq Platform (en)
skos:prefLabel	Towards Evolvable Systems Based on the Xilinx Zynq Platform Towards Evolvable Systems Based on the Xilinx Zynq Platform (en)
skos:notation	RIV/00216305:26230/13:PU106296!RIV14-GA0-26230___
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(ED1.1.00/02.0070), P(GAP103/10/1517)
http://linked.open...vai/riv/dodaniDat	2014
http://linked.open...aciTvurceVysledku	Sekanina, Lukáš Dobai, Roland
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	111374
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/13:PU106296
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	FPGA, evolvable hardware, reconfiguration, digital circuit, image filter, zynq (en)
http://linked.open.../riv/klicoveSlovo	digital circuit image filter FPGA zynq evolvable hardware reconfiguration
http://linked.open...ontrolniKodProRIV	[6B6044C16DFA]
http://linked.open...v/mistoKonaniAkce	Singapore
http://linked.open...i/riv/mistoVydani	Singapur
http://linked.open...i/riv/nazevZdroje	2013 IEEE International Conference on Evolvable Systems (ICES)
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...vavai/riv/projekt	IT4Innovations Centre of Excellence Natural Computing on Unconventional Platforms
http://linked.open...UplatneniVysledku	2013
http://linked.open...iv/tvurceVysledku	Sekanina, Lukáš Dobai, Roland
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2013-04-15 (xsd:date)
number of pages	7 (xsd:int)
http://bibframe.org/vocab/doi	10.1109/ICES.2013.6613287
http://purl.org/ne...btex#hasPublisher	IEEE Computational Intelligence Society
https://schema.org/isbn	978-1-4673-5869-9
http://localhost/t...ganizacniJednotka	26230

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