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  • A new accelerator of Cartesian genetic programming is presented in this paper. The accelerator is completely implemented in a single FPGA. The proposed architecture contains multiple instances of virtual reconfigurable circuit to evaluate several candidate solutions in parallel. An advanced memory organization was developed to achieve the maximum throughput of processing. The search algorithm is implemented using the on-chip PowerPC processor. In the benchmark problem (image filter evolution) the proposed platform provides a significant speedup (170) in comparison with a highly optimized software implementation. Moreover, the accelerator is 8 times faster than previous FPGA accelerators of image filter evolution.
  • A new accelerator of Cartesian genetic programming is presented in this paper. The accelerator is completely implemented in a single FPGA. The proposed architecture contains multiple instances of virtual reconfigurable circuit to evaluate several candidate solutions in parallel. An advanced memory organization was developed to achieve the maximum throughput of processing. The search algorithm is implemented using the on-chip PowerPC processor. In the benchmark problem (image filter evolution) the proposed platform provides a significant speedup (170) in comparison with a highly optimized software implementation. Moreover, the accelerator is 8 times faster than previous FPGA accelerators of image filter evolution. (en)
Title
  • Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units
  • Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units (en)
skos:prefLabel
  • Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units
  • Hardware Accelerator of Cartesian Genetic Programming with Multiple Fitness Units (en)
skos:notation
  • RIV/00216305:26230/10:PU90534!RIV11-GA0-26230___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/07/0850), P(GD102/09/H042), S, Z(MSM0021630528)
http://linked.open...iv/cisloPeriodika
  • 6
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 261209
http://linked.open...ai/riv/idVysledku
  • RIV/00216305:26230/10:PU90534
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • Cartesian genetic programming, hardware accelerator, evolutionary circuit design, FPGA (en)

http://linked.open.../riv/klicoveSlovo
http://linked.open...odStatuVydavatele
  • SK - Slovenská republika
http://linked.open...ontrolniKodProRIV
  • [82BE252EB837]
http://linked.open...i/riv/nazevZdroje
  • Computing and Informatics
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...v/svazekPeriodika
  • 29
http://linked.open...iv/tvurceVysledku
  • Sekanina, Lukáš
  • Vašíček, Zdeněk
http://linked.open...n/vavai/riv/zamer
issn
  • 1335-9150
number of pages
http://localhost/t...ganizacniJednotka
  • 26230
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