About: High Availability Fault Tolerant Architectures Implemented into FPGAs

Facets (new session)
Description
Metadata
Settings
- owl:sameAs
- Inference Rule:

About: High Availability Fault Tolerant Architectures Implemented into FPGAs Goto Sponge NotDistinct Permalink

An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

Attributes	Values
rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	In the paper, the methodology of fault tolerant systems design based on FPGA are presented. The architectures are based both on duplex and TMR systems to which fault detection capabilities are added, the use of on-line checkers for this purpose is demonstrated. It is described how reliability and availability parameters in TMR and duplex structures with checkers can be increased. To demonstrate this, analytical calculations based on Markov reliability model are used. It is also shown how the availability parameters can be affected by the operating environment into which the fault tolerant system is implemented. The principles of generating sequence of FT architectures with different level of diagnostic are presented. In the paper, the methodology of fault tolerant systems design based on FPGA are presented. The architectures are based both on duplex and TMR systems to which fault detection capabilities are added, the use of on-line checkers for this purpose is demonstrated. It is described how reliability and availability parameters in TMR and duplex structures with checkers can be increased. To demonstrate this, analytical calculations based on Markov reliability model are used. It is also shown how the availability parameters can be affected by the operating environment into which the fault tolerant system is implemented. The principles of generating sequence of FT architectures with different level of diagnostic are presented. (en)
Title	High Availability Fault Tolerant Architectures Implemented into FPGAs High Availability Fault Tolerant Architectures Implemented into FPGAs (en)
skos:prefLabel	High Availability Fault Tolerant Architectures Implemented into FPGAs High Availability Fault Tolerant Architectures Implemented into FPGAs (en)
skos:notation	RIV/00216305:26230/09:PU82605!RIV11-GA0-26230___
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(GA102/09/1668), P(GD102/09/H042), Z(MSM0021630528)
http://linked.open...vai/riv/dodaniDat	2011
http://linked.open...aciTvurceVysledku	Straka, Martin Kotásek, Zdeněk
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	317079
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/09:PU82605
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	TMR, availability,&nbsp,Markov reliability model, FPGA, fault tolerant systems, checker (en)
http://linked.open.../riv/klicoveSlovo	FPGA availability TMR checker &nbsp fault tolerant systems Markov reliability model
http://linked.open...ontrolniKodProRIV	[905F7F6339A1]
http://linked.open...v/mistoKonaniAkce	Patras
http://linked.open...i/riv/mistoVydani	Patras
http://linked.open...i/riv/nazevZdroje	12th EUROMICRO Conference on Digital System Design DSD 2009
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...vavai/riv/projekt	SoC circuits reliability and availability improvement Mathematical and Engineering Approaches to Developing Reliable and Secure Concurrent and Distributed Computer Systems
http://linked.open...UplatneniVysledku	2009
http://linked.open...iv/tvurceVysledku	Kotásek, Zdeněk Straka, Martin
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2009-08-27 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Výzkum informačních technologií z hlediska bezpečnosti
number of pages	8 (xsd:int)
http://purl.org/ne...btex#hasPublisher	IEEE Computer Society
https://schema.org/isbn	978-0-7695-3782-5
http://localhost/t...ganizacniJednotka	26230

Faceted Search & Find service v1.16.118 as of Jun 21 2024

Alternative Linked Data Documents: ODE Content Formats:

RDF

ODATA

Microdata

About

OpenLink Virtuoso version 07.20.3240 as of Jun 21 2024, on Linux (x86_64-pc-linux-gnu), Single-Server Edition (126 GB total memory, 35 GB memory in use)
Data on this page belongs to its respective rights holders.
Virtuoso Faceted Browser Copyright © 2009-2024 OpenLink Software