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rdf:type
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Description
| - Článek se zabývá návrhem Aplikačně Specifických Instrukčních Procesorů a generováním softwarových nástrojů pro vývoj aplikací na těchto procesorech na základě UML popisu mikroprocesoru. (cs)
- There are many possibilities how to describe the architecture of the embedded system eventually of the whole microprocessor. The description is realized usually using any special language, which only rarely provides a formal description of the architecture. The formal description is useful for an easily verification of the most critical parts of the architecture. Our task deals with the formal description of the Application Specific Instruction set Processors (ASIP) in UML. Due to the lower complexity of this type of processor, it is possible to generate automatically the software toolset from the model, which provide fluent development of the microprocessor's applications. The task is to provide the methodology for fully automatized design of microprocessor base on the UML description.
- There are many possibilities how to describe the architecture of the embedded system eventually of the whole microprocessor. The description is realized usually using any special language, which only rarely provides a formal description of the architecture. The formal description is useful for an easily verification of the most critical parts of the architecture. Our task deals with the formal description of the Application Specific Instruction set Processors (ASIP) in UML. Due to the lower complexity of this type of processor, it is possible to generate automatically the software toolset from the model, which provide fluent development of the microprocessor's applications. The task is to provide the methodology for fully automatized design of microprocessor base on the UML description. (en)
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Title
| - UML IN DESIGN OF ASIP
- UML IN DESIGN OF ASIP (en)
- UML pro návrh ASIP (cs)
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skos:prefLabel
| - UML IN DESIGN OF ASIP
- UML IN DESIGN OF ASIP (en)
- UML pro návrh ASIP (cs)
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skos:notation
| - RIV/00216305:26230/06:PU66977!RIV07-MSM-26230___
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http://linked.open.../vavai/riv/strany
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
| - P(FT-TA3/128), Z(MSM0021630503)
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/00216305:26230/06:PU66977
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
| - ASIP, architecture description language, UML (en)
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...v/mistoKonaniAkce
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http://linked.open...i/riv/mistoVydani
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http://linked.open...i/riv/nazevZdroje
| - A proceedings volume from the 3rd IFAC Workshop on Discrete-Event System Design DESDes'06
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...vavai/riv/projekt
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http://linked.open...UplatneniVysledku
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http://linked.open...iv/tvurceVysledku
| - Hruška, Tomáš
- Masařík, Karel
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http://linked.open...vavai/riv/typAkce
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http://linked.open.../riv/zahajeniAkce
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http://linked.open...n/vavai/riv/zamer
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number of pages
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http://purl.org/ne...btex#hasPublisher
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https://schema.org/isbn
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http://localhost/t...ganizacniJednotka
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