About: Testability Estimation Based on Controllability and Observability Parameters

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	In the paper a method for estimation the circuit testability on the Register Transfer Level (RTL) is presented. The method allows to perform fast testability estimation in linear time complexity (regarding the number of components and interconnects of the circuit). Proposed approach is based on utilization of controllability and observability measurement for estimation of overall circuit testability. The application of developed method is demonstrated in a software tool for the development of RTL benchmark circuits with predefined testability properties. The results gained by our testability analysis method are compared with the results of professional ATPG tool. Experiments show the good correlation of the results obtained by our method and professional ATPG tool with significantly lower time complexity when our algorithm is used. In the paper a method for estimation the circuit testability on the Register Transfer Level (RTL) is presented. The method allows to perform fast testability estimation in linear time complexity (regarding the number of components and interconnects of the circuit). Proposed approach is based on utilization of controllability and observability measurement for estimation of overall circuit testability. The application of developed method is demonstrated in a software tool for the development of RTL benchmark circuits with predefined testability properties. The results gained by our testability analysis method are compared with the results of professional ATPG tool. Experiments show the good correlation of the results obtained by our method and professional ATPG tool with significantly lower time complexity when our algorithm is used. (en) In the paper a method for estimation the circuit testability on the Register Transfer Level (RTL) is presented. The method allows to perform fast testability estimation in linear time complexity (regarding the number of components and interconnects of the circuit). Proposed approach is based on utilization of controllability and observability measurement for estimation of overall circuit testability. The application of developed method is demonstrated in a software tool for the development of RTL benchmark circuits with predefined testability properties. The results gained by our testability analysis method are compared with the results of professional ATPG tool. Experiments show the good correlation of the results obtained by our method and professional ATPG tool with significantly lower time complexity when our algorithm is used. (cs)
Title	Testability Estimation Based on Controllability and Observability Parameters Odhad testovatelnosti na základě parametrů řiditelnosti a pozorovatelnosti (cs) Testability Estimation Based on Controllability and Observability Parameters (en)
skos:prefLabel	Testability Estimation Based on Controllability and Observability Parameters Odhad testovatelnosti na základě parametrů řiditelnosti a pozorovatelnosti (cs) Testability Estimation Based on Controllability and Observability Parameters (en)
skos:notation	RIV/00216305:26230/06:PU66959!RIV07-GA0-26230___
http://linked.open.../vavai/riv/strany	504-514
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(GA102/04/0737), P(GD102/05/H050)
http://linked.open...vai/riv/dodaniDat	2007
http://linked.open...aciTvurceVysledku	Sekanina, Lukáš Kotásek, Zdeněk Pečenka, Tomáš Strnadel, Josef
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	503539
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/06:PU66959
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	Testability analysis, controllability, observabillity (en)
http://linked.open.../riv/klicoveSlovo	Testability analysis controllability observabillity
http://linked.open...ontrolniKodProRIV	[330B3F2B06AE]
http://linked.open...v/mistoKonaniAkce	Hotel Croatia, Cavtat
http://linked.open...i/riv/mistoVydani	Cavtat
http://linked.open...i/riv/nazevZdroje	Proceedings of the 9th EUROMICRO Conference on Digital System Design (DSD'06)
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	4 (xsd:int)
http://linked.open...cetTvurcuVysledku	4 (xsd:int)
http://linked.open...vavai/riv/projekt	Integrated Approach to Education of PhD Students in the Area of Parallel and Distributed Systems Modern methods of digital system synthesis
http://linked.open...UplatneniVysledku	2006
http://linked.open...iv/tvurceVysledku	Kotásek, Zdeněk Sekanina, Lukáš Strnadel, Josef Pečenka, Tomáš
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2006-08-30 (xsd:date)
number of pages	11 (xsd:int)
http://purl.org/ne...btex#hasPublisher	IEEE Computer Society
https://schema.org/isbn	0-7695-2609-8
http://localhost/t...ganizacniJednotka	26230

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