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  • An approach to solve the test application problem is presented. On the basis of RT-level digital circuit formal model, properties of circuit elements, which are important for test controller synthesis, are discussed. Algorithm to extract such information from the model of the circuit and algorithm to create a model of test application to the selected circuit element are presented. To evaluate the relevance of given path for diagnostic data and possibility of parallelism, Petri Nets concept is used.
  • An approach to solve the test application problem is presented. On the basis of RT-level digital circuit formal model, properties of circuit elements, which are important for test controller synthesis, are discussed. Algorithm to extract such information from the model of the circuit and algorithm to create a model of test application to the selected circuit element are presented. To evaluate the relevance of given path for diagnostic data and possibility of parallelism, Petri Nets concept is used. (en)
Title
  • The Formal Approach to the RTL Test Application Problem Using Petri Nets
  • The Formal Approach to the RTL Test Application Problem Using Petri Nets (en)
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  • The Formal Approach to the RTL Test Application Problem Using Petri Nets
  • The Formal Approach to the RTL Test Application Problem Using Petri Nets (en)
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  • RIV/00216305:26230/02:PU36214!RIV/2003/GA0/262303/N
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  • 78-86
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  • P(GA102/01/1531)
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  • 646418
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  • RIV/00216305:26230/02:PU36214
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  • Design for Testability, Testability Analysis, Test Application Problem, Petri Nets (en)
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  • [5B0D0F738341]
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  • Brno
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  • Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems 2002
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  • Růžička, Richard
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  • Vysoké učení technické v Brně. Fakulta informačních technologií
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  • 80-214-2094-4
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  • 26230
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