About: FPGA Implementation of Residue-to-Binary Converters: A Comparison between New CRT-I and MRC Converters for the Moduli Set (2n-1, 2n, 2n+1)

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About: FPGA Implementation of Residue-to-Binary Converters: A Comparison between New CRT-I and MRC Converters for the Moduli Set (2n-1, 2n, 2n+1) Goto Sponge NotDistinct Permalink

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	This paper presents two designs of residue-to-binary converters, namely reverse converters. These designs are based on two well known algorithms for reverse conversion; Mixed-radix conversion (MRC) and the new Chinese remainder theorem 1 (new CRT-I). A comparison is done in order to highlight the differences between the two algorithms when implemented on field programmable gate array FPGA, in terms of time and area consumption. Both converters are dedicated for the moduli set (2n-1, 2n, 2n+1). This paper presents two designs of residue-to-binary converters, namely reverse converters. These designs are based on two well known algorithms for reverse conversion; Mixed-radix conversion (MRC) and the new Chinese remainder theorem 1 (new CRT-I). A comparison is done in order to highlight the differences between the two algorithms when implemented on field programmable gate array FPGA, in terms of time and area consumption. Both converters are dedicated for the moduli set (2n-1, 2n, 2n+1). (en)
Title	FPGA Implementation of Residue-to-Binary Converters: A Comparison between New CRT-I and MRC Converters for the Moduli Set (2n-1, 2n, 2n+1) FPGA Implementation of Residue-to-Binary Converters: A Comparison between New CRT-I and MRC Converters for the Moduli Set (2n-1, 2n, 2n+1) (en)
skos:prefLabel	FPGA Implementation of Residue-to-Binary Converters: A Comparison between New CRT-I and MRC Converters for the Moduli Set (2n-1, 2n, 2n+1) FPGA Implementation of Residue-to-Binary Converters: A Comparison between New CRT-I and MRC Converters for the Moduli Set (2n-1, 2n, 2n+1) (en)
skos:notation	RIV/00216305:26220/11:PU93978!RIV12-MSM-26220___
http://linked.open...avai/riv/aktivita	Z
http://linked.open...avai/riv/aktivity	Z(MSM0021630503)
http://linked.open...iv/cisloPeriodika	1
http://linked.open...vai/riv/dodaniDat	2012
http://linked.open...aciTvurceVysledku	Šteffan, Pavel Younes, Dina
http://linked.open.../riv/druhVysledku	J - Článek v odborném periodiku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta elektrotechniky a komunikačních technologií
http://linked.open...dnocenehoVysledku	200267
http://linked.open...ai/riv/idVysledku	RIV/00216305:26220/11:PU93978
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	Residue number system, residue to binary converters, mixed-radix conversion, new Chinese remainder theorem 1, FPGA implementation (en)
http://linked.open.../riv/klicoveSlovo	FPGA implementation Residue number system mixed-radix conversion new Chinese remainder theorem 1 residue to binary converters
http://linked.open...odStatuVydavatele	BG - Bulharská republika
http://linked.open...ontrolniKodProRIV	[B5096C76F273]
http://linked.open...i/riv/nazevZdroje	Electronics
http://linked.open...in/vavai/riv/obor	JA
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...UplatneniVysledku	2011
http://linked.open...v/svazekPeriodika	5
http://linked.open...iv/tvurceVysledku	Šteffan, Pavel Younes, Dina
http://linked.open...n/vavai/riv/zamer	Nové trendy v mikroelektronických systémech a nanotechnologiích (MIKROSYN)
issn	1313-1842
number of pages	4 (xsd:int)
http://localhost/t...ganizacniJednotka	26220

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