The paper describes multi-core computing unit implemented into FPGA chip. The unit is used for accelerating of Artificial Neural Networks computations.
The paper describes multi-core computing unit implemented into FPGA chip. The unit is used for accelerating of Artificial Neural Networks computations. (en)
ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics Proceedings Volume 1 - Inteligent Control Systems and Optimization