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  • The contribution deals with a binary representation of integer and real numbers. In domain of digital signal processing the number representation is either in fixed-point or floating-point form. In the text the algorithm for unsigned binary multiplication for fixed-point representation is presented. There are many processors with fixed or floating-point representation and there are also several blocks used for arithmetical operations in FPGA. But generally these blocks do not have a large variability in terms of bit width. The goal of the contribution is mainly to present an arithmetical model and to evaluate its complexity for a large number of possible implemented algorithms. For testing of product algorithm the multidimensional convolution of gray scale images was performed as well.
  • The contribution deals with a binary representation of integer and real numbers. In domain of digital signal processing the number representation is either in fixed-point or floating-point form. In the text the algorithm for unsigned binary multiplication for fixed-point representation is presented. There are many processors with fixed or floating-point representation and there are also several blocks used for arithmetical operations in FPGA. But generally these blocks do not have a large variability in terms of bit width. The goal of the contribution is mainly to present an arithmetical model and to evaluate its complexity for a large number of possible implemented algorithms. For testing of product algorithm the multidimensional convolution of gray scale images was performed as well. (en)
Title
  • Introduction to Fixed-point Multiplication and Signal Processing Application
  • Introduction to Fixed-point Multiplication and Signal Processing Application (en)
skos:prefLabel
  • Introduction to Fixed-point Multiplication and Signal Processing Application
  • Introduction to Fixed-point Multiplication and Signal Processing Application (en)
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  • RIV/00216305:26220/09:PU80921!RIV10-MSM-26220___
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  • Z(MSM0021630513)
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  • 320247
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  • RIV/00216305:26220/09:PU80921
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  • Digital arithmetic, Fixed point arithmetic, Multiplication, Multidimensional signal processing (en)
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  • [D530782A1318]
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  • Institute for Public Administration
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  • Bratislava (Slovakia)
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  • Proceedings of 19th International Conference Radioelektronika 2009
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  • Frýza, Tomáš
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number of pages
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  • Neuveden
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  • 978-1-4244-3536-4
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  • 26220
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