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Description
  • Článek popisuje kroky při návrhu decimačního filtru v jazyce VHDL pro vícebitový sigma-delta modulátor. Parametry decimačního filtru jsou odvozeny ze specifikace vícebitového sigma-delta modulátoru se dvěma kroky kvantovacího procesu. Návrh decimačního filtru byl proveden teoreticky v programu Matlab. Výsledná implementace byla provedena v obvodu Xilinx FPGA Spartan 3 XC3S200-5FT256. (cs)
  • This paper describes steps involved in a VHDL design of digital decimation filter for multibit sigma-delta (ΣΔ) modulator. Parameters of decimation filter are derived from the specification of the multibit Σ∆ modulator with two-step quantization architecture. Using Matlabtool it is possible to find the filter order, the required quantizationlevel for the coefficients and their values. Finally, by analyzing the design, we can find an efficient way to implement the filter in hardware. This structure is designed in two versions using VHDL. The design is programmed and tested on a Xilinx FPGA –Spartan 3 XC3S200-5FT256.
  • This paper describes steps involved in a VHDL design of digital decimation filter for multibit sigma-delta (ΣΔ) modulator. Parameters of decimation filter are derived from the specification of the multibit Σ∆ modulator with two-step quantization architecture. Using Matlabtool it is possible to find the filter order, the required quantizationlevel for the coefficients and their values. Finally, by analyzing the design, we can find an efficient way to implement the filter in hardware. This structure is designed in two versions using VHDL. The design is programmed and tested on a Xilinx FPGA –Spartan 3 XC3S200-5FT256. (en)
Title
  • DESIGN OF DECIMATION FILTER FOR MULTIBIT SIGMA-DELTA MODULATOR WITH TWO-STEP QUANTIZATION
  • Návrh decimačního filtru pro vícebitový sigma-delta modulátor se dvěma kroky kvantovacího procesu. (cs)
  • DESIGN OF DECIMATION FILTER FOR MULTIBIT SIGMA-DELTA MODULATOR WITH TWO-STEP QUANTIZATION (en)
skos:prefLabel
  • DESIGN OF DECIMATION FILTER FOR MULTIBIT SIGMA-DELTA MODULATOR WITH TWO-STEP QUANTIZATION
  • Návrh decimačního filtru pro vícebitový sigma-delta modulátor se dvěma kroky kvantovacího procesu. (cs)
  • DESIGN OF DECIMATION FILTER FOR MULTIBIT SIGMA-DELTA MODULATOR WITH TWO-STEP QUANTIZATION (en)
skos:notation
  • RIV/00216305:26220/06:PU63772!RIV07-GA0-26220___
http://linked.open.../vavai/riv/strany
  • 83-86
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/05/0869), Z(MSM0021630503)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 470940
http://linked.open...ai/riv/idVysledku
  • RIV/00216305:26220/06:PU63772
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • decimation filter, programmable logic device (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [584EECD2EF49]
http://linked.open...v/mistoKonaniAkce
  • Gdynia
http://linked.open...i/riv/mistoVydani
  • Gdynia
http://linked.open...i/riv/nazevZdroje
  • Proceedings of the International Conference, Mixed Design of Integrated Circuits and Systems
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Fujcik, Lukáš
  • Mougel, Thibault
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • Neuveden
https://schema.org/isbn
  • 83-922632-1-9
http://localhost/t...ganizacniJednotka
  • 26220
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