| Attributes | Values |
|---|
| rdf:type
| |
| Description
| - Signálové procesory s Harvardskou architekturou jsou postupně nahrazovány výkonnějšími a rychlejšími signálovými procesory typu VLIW. Příspěvek pojednává o nové metodě optimalizace algortimů, kdy je nutné optimalizovat algoritmy z hlediska architektury signálového procesoru, přizpůsobit datové typy a využívat intrinsic instrukce. (cs)
- Digital signal processors with Harvard architecture are being gradually replaced by digital signal processors with VLIW (Very Long Instruction Word) architecture for high-end applications. Owing to exploiting the principles of parallel instruction processing and parallel data processing, the new architecture provides the calculation power to implement complex algorithms of digital signal processing. On the other hand, it is very difficult to write programs such that they make optimum use of architecturee properties. The paper summarizes the present authors' experience obtained in optimum design of algorithms for digital signal processors with VLIW architecture. Using this new approach it was, for example, possible to optimize compilation from the C language into the assembler of TMS320C6414 (Texas Instruments) digital signal processor for type GSM encoder [7] and to speed up the processing about 25 times. The method consists in a closer linkage between the theory of digital signal processing, software
- Digital signal processors with Harvard architecture are being gradually replaced by digital signal processors with VLIW (Very Long Instruction Word) architecture for high-end applications. Owing to exploiting the principles of parallel instruction processing and parallel data processing, the new architecture provides the calculation power to implement complex algorithms of digital signal processing. On the other hand, it is very difficult to write programs such that they make optimum use of architecturee properties. The paper summarizes the present authors' experience obtained in optimum design of algorithms for digital signal processors with VLIW architecture. Using this new approach it was, for example, possible to optimize compilation from the C language into the assembler of TMS320C6414 (Texas Instruments) digital signal processor for type GSM encoder [7] and to speed up the processing about 25 times. The method consists in a closer linkage between the theory of digital signal processing, software (en)
|
| Title
| - Digital Signal Processing Algprithm Optimization for VLIW Digital Signal Processors
- Optimalizace algoritmů číslicového zpracování signálů pro signálové procesory typu VLIW (cs)
- Digital Signal Processing Algprithm Optimization for VLIW Digital Signal Processors (en)
|
| skos:prefLabel
| - Digital Signal Processing Algprithm Optimization for VLIW Digital Signal Processors
- Optimalizace algoritmů číslicového zpracování signálů pro signálové procesory typu VLIW (cs)
- Digital Signal Processing Algprithm Optimization for VLIW Digital Signal Processors (en)
|
| skos:notation
| - RIV/00216305:26220/06:PU55509!RIV06-GA0-26220___
|
| http://linked.open.../vavai/riv/strany
| |
| http://linked.open...avai/riv/aktivita
| |
| http://linked.open...avai/riv/aktivity
| - P(1ET301710509), P(GA102/04/1097), Z(MSM0021630513)
|
| http://linked.open...vai/riv/dodaniDat
| |
| http://linked.open...aciTvurceVysledku
| |
| http://linked.open.../riv/druhVysledku
| |
| http://linked.open...iv/duvernostUdaju
| |
| http://linked.open...titaPredkladatele
| |
| http://linked.open...dnocenehoVysledku
| |
| http://linked.open...ai/riv/idVysledku
| - RIV/00216305:26220/06:PU55509
|
| http://linked.open...riv/jazykVysledku
| |
| http://linked.open.../riv/klicovaSlova
| - Digital signal processor architecture, algoprithm optimization. (en)
|
| http://linked.open.../riv/klicoveSlovo
| |
| http://linked.open...ontrolniKodProRIV
| |
| http://linked.open...v/mistoKonaniAkce
| |
| http://linked.open...i/riv/mistoVydani
| |
| http://linked.open...i/riv/nazevZdroje
| - Proceedings of the Second International Symposium on Communications, Control and Signal Processing
|
| http://linked.open...in/vavai/riv/obor
| |
| http://linked.open...ichTvurcuVysledku
| |
| http://linked.open...cetTvurcuVysledku
| |
| http://linked.open...vavai/riv/projekt
| |
| http://linked.open...UplatneniVysledku
| |
| http://linked.open...iv/tvurceVysledku
| - Smékal, Zdeněk
- Sysel, Petr
|
| http://linked.open...vavai/riv/typAkce
| |
| http://linked.open.../riv/zahajeniAkce
| |
| http://linked.open...n/vavai/riv/zamer
| |
| number of pages
| |
| http://purl.org/ne...btex#hasPublisher
| - SuviSoft, Oy Ltd., Finland
|
| https://schema.org/isbn
| |
| http://localhost/t...ganizacniJednotka
| |
![[RDF Data]](/fct/images/sw-rdf-blue.png)
![[cxml]](/fct/images/cxml_doc.png)
![[csv]](/fct/images/csv_doc.png)
![[text]](/fct/images/ntriples_doc.png)
![[turtle]](/fct/images/n3turtle_doc.png)
![[ld+json]](/fct/images/jsonld_doc.png)
![[rdf+json]](/fct/images/json_doc.png)
![[rdf+xml]](/fct/images/xml_doc.png)
![[atom+xml]](/fct/images/atom_doc.png)
![[html]](/fct/images/html_doc.png)