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Description
  • This paper describes steps involved in a new VHDL design of a decimation filter for a sigma-delta (Σ∆) modulator. Parameters of decimation filter are derived from the specifications of the overall Σ∆ modulator. Using Matlab and MathCAD tool it is possible to find the filter order, the required quantization level for the coefficients and their values. Finally, by analyzing the design, we can find an efficient way to implement the filter in hardware. This structure is designed in two versions using VHDL. The first version is programmed and tested on a FPGA chip. Then second version was created for Cadence software tool to implement into a chip in the AMIS CMOS 0.7 µm technology.
  • This paper describes steps involved in a new VHDL design of a decimation filter for a sigma-delta (Σ∆) modulator. Parameters of decimation filter are derived from the specifications of the overall Σ∆ modulator. Using Matlab and MathCAD tool it is possible to find the filter order, the required quantization level for the coefficients and their values. Finally, by analyzing the design, we can find an efficient way to implement the filter in hardware. This structure is designed in two versions using VHDL. The first version is programmed and tested on a FPGA chip. Then second version was created for Cadence software tool to implement into a chip in the AMIS CMOS 0.7 µm technology. (en)
  • Tento článek popisuje kroky, které jsou nutné použít pro návrh decimačního filtru. Parametry decimačního filtru jsou odvozeny ze specifikace modulátoru sigma-delta. K návrhu decimačního filtru byly použity programy Matlab a MathCAD. Byly navrženy dvě verze decimačního filtru. První verze decimačního je určena pro programovatelné logické obvody a druhá verze je určena pro návrh na čip v technologii AMIS CMOS 0.7 µm. (cs)
Title
  • Design of decimation filter for novel Sigma-Delta modulator
  • Návrh decimačního filtru pro novou architekturu modulátoru sigma-delta (cs)
  • Design of decimation filter for novel Sigma-Delta modulator (en)
skos:prefLabel
  • Design of decimation filter for novel Sigma-Delta modulator
  • Návrh decimačního filtru pro novou architekturu modulátoru sigma-delta (cs)
  • Design of decimation filter for novel Sigma-Delta modulator (en)
skos:notation
  • RIV/00216305:26220/05:PU53780!RIV07-GA0-26220___
http://linked.open.../vavai/riv/strany
  • 58-63
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/05/0869), P(GD102/03/H105), Z(MSM0021630503)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 517385
http://linked.open...ai/riv/idVysledku
  • RIV/00216305:26220/05:PU53780
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • sigma-delta modulator, decimation filter (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [5693BA735903]
http://linked.open...v/mistoKonaniAkce
  • Sozopol
http://linked.open...i/riv/mistoVydani
  • Bulgaria
http://linked.open...i/riv/nazevZdroje
  • THE FOURTEENT INTERNATIONAL SCIENTIFIC AND APPLIED SCIENCE CONFERENCE - ELECTRONICS ET'2005
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Fujcik, Lukáš
  • Mougel, Thibault
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • Technical University of Sofia
https://schema.org/isbn
  • 954-438-521-5
http://localhost/t...ganizacniJednotka
  • 26220
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