About: Specification and Synthesis of Reusable Modules in VHDL     Goto   Sponge   NotDistinct   Permalink

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  • Hardware-Software codesign, which implements a given specification with a set of system components such as ASIC, FPGA, CPLD, and processors, includes several key tasks such as system component allocation, functional partitioning, quality metrics estimation, and design space exploration. Hardware synthesis of embedded cores is one of the hardware-software codesign steps. In this paper, we focus on hardware reusable module specification. In addition, we describe how we can get many implementations to the specified reusable module using design space exploration during high-level synthesis (HLS) process. We propose a reusable module specification figure, and identify main concepts of the component created by the proposed methodology.
  • Hardware-Software codesign, which implements a given specification with a set of system components such as ASIC, FPGA, CPLD, and processors, includes several key tasks such as system component allocation, functional partitioning, quality metrics estimation, and design space exploration. Hardware synthesis of embedded cores is one of the hardware-software codesign steps. In this paper, we focus on hardware reusable module specification. In addition, we describe how we can get many implementations to the specified reusable module using design space exploration during high-level synthesis (HLS) process. We propose a reusable module specification figure, and identify main concepts of the component created by the proposed methodology. (en)
Title
  • Specification and Synthesis of Reusable Modules in VHDL
  • Specification and Synthesis of Reusable Modules in VHDL (en)
skos:prefLabel
  • Specification and Synthesis of Reusable Modules in VHDL
  • Specification and Synthesis of Reusable Modules in VHDL (en)
skos:notation
  • RIV/00216305:26220/01:PU28646!RIV/2002/GA0/262202/N
http://linked.open.../vavai/riv/strany
  • 137-140
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GA102/01/1531), Z(MSM 262200012)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 696632
http://linked.open...ai/riv/idVysledku
  • RIV/00216305:26220/01:PU28646
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • Hardware-software codesign, component allocation, functional partitioning, quality metrics estimation, design space exploration, reusable component (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [87BD4CFE0205]
http://linked.open...v/mistoKonaniAkce
  • Gyor
http://linked.open...i/riv/mistoVydani
  • Gyor, Hungary
http://linked.open...i/riv/nazevZdroje
  • Proceedings of fourth International Wokshop on IEEE Design and Diagnostics of Electronic Circuits and Systems IEEE DDCSE01
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...ocetUcastnikuAkce
http://linked.open...nichUcastnikuAkce
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Drábek, Vladimír
  • Sllame M., Azeddien
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
http://linked.open...n/vavai/riv/zamer
number of pages
http://purl.org/ne...btex#hasPublisher
  • SZIF-UNIVERSITAS Ltd., Hungary
https://schema.org/isbn
  • 963-7175-16-4
http://localhost/t...ganizacniJednotka
  • 26220
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