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  • Verification of embedded systems has become increasingly important in many industrial domains. Safety critical embedded systems, such as those developed in aerospace industry, are regularly subject to automated formal verification process. In this paper we extend our tool integration chain of parallel, explicit-state LTL model checker DIVINE and Matlab Simulink tool suit with an improved support of counterexample simulation. In particular, we show how to provide the verification engineer with a direct connection between the error discovered by the model checker and the simulation in Matlab Simulink. This work has been conducted within the Artemis project industrial Framework for Embedded Systems Tools (iFEST).
  • Verification of embedded systems has become increasingly important in many industrial domains. Safety critical embedded systems, such as those developed in aerospace industry, are regularly subject to automated formal verification process. In this paper we extend our tool integration chain of parallel, explicit-state LTL model checker DIVINE and Matlab Simulink tool suit with an improved support of counterexample simulation. In particular, we show how to provide the verification engineer with a direct connection between the error discovered by the model checker and the simulation in Matlab Simulink. This work has been conducted within the Artemis project industrial Framework for Embedded Systems Tools (iFEST). (en)
Title
  • Executing Model Checking Counterexamples in Simulink
  • Executing Model Checking Counterexamples in Simulink (en)
skos:prefLabel
  • Executing Model Checking Counterexamples in Simulink
  • Executing Model Checking Counterexamples in Simulink (en)
skos:notation
  • RIV/00216224:14330/12:00057861!RIV13-GA0-14330___
http://linked.open...avai/riv/aktivita
http://linked.open...avai/riv/aktivity
  • P(GAP202/11/0312)
http://linked.open...vai/riv/dodaniDat
http://linked.open...aciTvurceVysledku
http://linked.open.../riv/druhVysledku
http://linked.open...iv/duvernostUdaju
http://linked.open...titaPredkladatele
http://linked.open...dnocenehoVysledku
  • 135437
http://linked.open...ai/riv/idVysledku
  • RIV/00216224:14330/12:00057861
http://linked.open...riv/jazykVysledku
http://linked.open.../riv/klicovaSlova
  • LTL Model Checking; Simulink; Embedded Systems; DiVinE (en)
http://linked.open.../riv/klicoveSlovo
http://linked.open...ontrolniKodProRIV
  • [22C26730F1F6]
http://linked.open...v/mistoKonaniAkce
  • Beijing, China
http://linked.open...i/riv/mistoVydani
  • Neuveden
http://linked.open...i/riv/nazevZdroje
  • IEEE Sixth International Symposium on Theoretical Aspects of Software Engineering
http://linked.open...in/vavai/riv/obor
http://linked.open...ichTvurcuVysledku
http://linked.open...cetTvurcuVysledku
http://linked.open...vavai/riv/projekt
http://linked.open...UplatneniVysledku
http://linked.open...iv/tvurceVysledku
  • Barnat, Jiří
  • Beran, Jan
  • Brim, Luboš
  • Kratochvíla, Tomáš
  • de Oliveira, Italo Romani
http://linked.open...vavai/riv/typAkce
http://linked.open.../riv/zahajeniAkce
number of pages
http://purl.org/ne...btex#hasPublisher
  • IEEE Computer Society
https://schema.org/isbn
  • 9780769547510
http://localhost/t...ganizacniJednotka
  • 14330
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