About: VHDL Design Verification Tools

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	The software package consists of three modules - VHD2XML, OPTIMVHD, and ANALYSEVHD. First, the module VHD2XML performs translation from VHDL into XML (abstract syntax tree). OPTIMVHD performs optimizations at the XML level, in particular, the individual VHDL constructs are normalized. Finally, the module ANALYSEVHD performs basic static analysis of the program. Currently supported analysis feature is interconnection of wires/signals among VHDL entities. The software package consists of three modules - VHD2XML, OPTIMVHD, and ANALYSEVHD. First, the module VHD2XML performs translation from VHDL into XML (abstract syntax tree). OPTIMVHD performs optimizations at the XML level, in particular, the individual VHDL constructs are normalized. Finally, the module ANALYSEVHD performs basic static analysis of the program. Currently supported analysis feature is interconnection of wires/signals among VHDL entities. (en)
Title	VHDL Design Verification Tools VHDL Design Verification Tools (en)
skos:prefLabel	VHDL Design Verification Tools VHDL Design Verification Tools (en)
skos:notation	RIV/00216224:14330/09:00035592!RIV10-MSM-14330___
http://linked.open...avai/riv/aktivita	P S
http://linked.open...avai/riv/aktivity	P(1M0545), S
http://linked.open...vai/riv/dodaniDat	2010
http://linked.open...aciTvurceVysledku	Smrčka, Aleš Řehák, Zdeněk Holeček, Jan Šafránek, David Řehák, Vojtěch
http://linked.open.../riv/druhVysledku	R - Software
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Masarykova univerzita / Fakulta informatiky
http://linked.open...dnocenehoVysledku	348773
http://linked.open...ai/riv/idVysledku	RIV/00216224:14330/09:00035592
http://linked.open...terniIdentifikace	VHD2XML
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	VHDL programs; static analysis; XML (en)
http://linked.open.../riv/klicoveSlovo	VHDL programs XML static analysis
http://linked.open...ontrolniKodProRIV	[6773D03C8DE1]
http://linked.open.../licencniPoplatek	N - Poskytovatel licence na výsledek nepožaduje licenční poplatek
http://linked.open...okalizaceVysledku	http://vhdlverif.sourceforge.net/
http://linked.open...in/vavai/riv/obor	IN
http://linked.open...ichTvurcuVysledku	5 (xsd:int)
http://linked.open...cetTvurcuVysledku	5 (xsd:int)
http://linked.open...vavai/riv/projekt	Institute for Theoretical Computer Science
http://linked.open...UplatneniVysledku	2009
http://linked.open...echnickeParametry	Balíček programů pro převod VHDL programů do uniformní reprezentace v XML formátu na jehož úrovni je implementována statická analýza chyb.
http://linked.open...iv/tvurceVysledku	Holeček, Jan Šafránek, David Řehák, Zdeněk Řehák, Vojtěch Smrčka, Aleš
http://linked.open...avai/riv/vlastnik	Masarykova univerzita
http://linked.open...itiJinymSubjektem	A - Nabytí licence je nutné vždy
http://localhost/t...ganizacniJednotka	14330

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