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rdf:type
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Description
| - Článek se zabívá popisem vytvořené platformy pro síťové aplikace.<br> (cs)
- Increasing network bandwidth enables creation of more efficient and new<br> client-server type applications but requires more computational power in the servers. This paper presents a qualitatively new approach to implementation of~the applications in such servers. The proposed approach relies on the FPGA-based hardware accelerator board that supports implementation of the~computational core of the applications or pre/post-processing of the data in the FPGA. Usage of such board relieves the serveer from the network-related data processing while leaving more computational power to the application itself. This paper demonstrates the proposed approach and describes the developed application platform containing 1 or 10 Gbps network interface, PCI<br> interface, and CAM/SRAM/DRAM memory chips.
- Increasing network bandwidth enables creation of more efficient and new<br> client-server type applications but requires more computational power in the servers. This paper presents a qualitatively new approach to implementation of~the applications in such servers. The proposed approach relies on the FPGA-based hardware accelerator board that supports implementation of the~computational core of the applications or pre/post-processing of the data in the FPGA. Usage of such board relieves the serveer from the network-related data processing while leaving more computational power to the application itself. This paper demonstrates the proposed approach and describes the developed application platform containing 1 or 10 Gbps network interface, PCI<br> interface, and CAM/SRAM/DRAM memory chips. (en)
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Title
| - FPGA-Based Platform for Network Applications
- FPGA-Based Platform for Network Applications (en)
- FPGA-Based Platform for Network Applications (cs)
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skos:prefLabel
| - FPGA-Based Platform for Network Applications
- FPGA-Based Platform for Network Applications (en)
- FPGA-Based Platform for Network Applications (cs)
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skos:notation
| - RIV/00216305:26230/05:PU55726!RIV06-MSM-26230___
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http://linked.open.../vavai/riv/strany
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/00216305:26230/05:PU55726
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
| - FPGA, network application, gmii, xgmii, PCI, bus master (en)
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...v/mistoKonaniAkce
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http://linked.open...i/riv/mistoVydani
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http://linked.open...i/riv/nazevZdroje
| - Proc. of 8th IEEE Design and Diagnostic of Electronic Circuits and Systems Workshop
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...UplatneniVysledku
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http://linked.open...iv/tvurceVysledku
| - Martínek, Tomáš
- Zemčík, Pavel
- Kořenek, Jan
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http://linked.open...vavai/riv/typAkce
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http://linked.open.../riv/zahajeniAkce
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http://linked.open...n/vavai/riv/zamer
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number of pages
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http://purl.org/ne...btex#hasPublisher
| - University of West Hungary
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https://schema.org/isbn
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http://localhost/t...ganizacniJednotka
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