About: Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	A specialized architecture was developed and evaluated to evolve relatively<br>large sorting networks in an ordinary FPGA. Genetic unit and fitness function are also implemented on the same FPGA. We evolved sorting networks up to N=28. The evolution of the largest sorting networks requires 10 hours in FPGA running at 100 MHz. The experiments were performed using COMBO6 card. A specialized architecture was developed and evaluated to evolve relatively<br>large sorting networks in an ordinary FPGA. Genetic unit and fitness function are also implemented on the same FPGA. We evolved sorting networks up to N=28. The evolution of the largest sorting networks requires 10 hours in FPGA running at 100 MHz. The experiments were performed using COMBO6 card. (en)
Title	Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs (en)
skos:prefLabel	Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs Intrinsic Evolution of Sorting Networks: A Novel Complete Hardware Implementation for FPGAs (en)
skos:notation	RIV/00216305:26230/05:PU56466!RIV10-GA0-26230___
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(GP102/03/P004)
http://linked.open...vai/riv/dodaniDat	2010
http://linked.open...aciTvurceVysledku	Kořenek, Jan Sekanina, Lukáš
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	525532
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/05:PU56466
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	Evolution, FPGA, sorting network<br> (en)
http://linked.open.../riv/klicoveSlovo	Evolution FPGA sorting network<br>
http://linked.open...ontrolniKodProRIV	[7B14372843E9]
http://linked.open...v/mistoKonaniAkce	Barcelona
http://linked.open...i/riv/mistoVydani	Berlin
http://linked.open...i/riv/nazevZdroje	Evolvable Systems: From Biology to Hardware
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	2 (xsd:int)
http://linked.open...cetTvurcuVysledku	2 (xsd:int)
http://linked.open...vavai/riv/projekt	Evolvable hardware based applications design methods
http://linked.open...UplatneniVysledku	2005
http://linked.open...iv/tvurceVysledku	Sekanina, Lukáš Kořenek, Jan
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2005-09-12 (xsd:date)
number of pages	10 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Springer-Verlag
https://schema.org/isbn	978-3-540-28736-0
http://localhost/t...ganizacniJednotka	26230

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