About: Logarithmic number system and floating-point arithmetics an FPGA.

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	An introduction to a logarithmic number system (LNS) is presented. Range and procision of this arithmetic is briefly discussed. We show that the LNS arithmetics is suitable for a FPGA implementation. A case study will compare parameters of our LNS arithmetic library to a conventional floating-point arithmetic. An introduction to a logarithmic number system (LNS) is presented. Range and procision of this arithmetic is briefly discussed. We show that the LNS arithmetics is suitable for a FPGA implementation. A case study will compare parameters of our LNS arithmetic library to a conventional floating-point arithmetic. (en)
Title	Logarithmic number system and floating-point arithmetics an FPGA. Logarithmic number system and floating-point arithmetics an FPGA. (en)
skos:prefLabel	Logarithmic number system and floating-point arithmetics an FPGA. Logarithmic number system and floating-point arithmetics an FPGA. (en)
skos:notation	RIV/67985556:_____/03:16030184!RIV/2004/AV0/A16004/N
http://linked.open.../vavai/riv/strany	9;16
http://linked.open...avai/riv/aktivita	Z
http://linked.open...avai/riv/aktivity	Z(AV0Z1075907)
http://linked.open...vai/riv/dodaniDat	2004
http://linked.open...aciTvurceVysledku	Pohl, Zdeněk
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Ústav teorie informace a automatizace AV ČR, v. v. i.
http://linked.open...dnocenehoVysledku	613772
http://linked.open...ai/riv/idVysledku	RIV/67985556:_____/03:16030184
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	LNS arithmetic; floating-point; FPGA (en)
http://linked.open.../riv/klicoveSlovo	FPGA floating-point LNS arithmetic
http://linked.open...ontrolniKodProRIV	[D6CB13360C9E]
http://linked.open...v/mistoKonaniAkce	Zvíkovské podhradí [CZ]
http://linked.open...i/riv/mistoVydani	Brno
http://linked.open...i/riv/nazevZdroje	Počítačové Architektury & Diagnostika PAD 2003.
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	1 (xsd:int)
http://linked.open...cetTvurcuVysledku	1 (xsd:int)
http://linked.open...ocetUcastnikuAkce	0 (xsd:int)
http://linked.open...nichUcastnikuAkce	0 (xsd:int)
http://linked.open...UplatneniVysledku	2003
http://linked.open...iv/tvurceVysledku	Pohl, Zdeněk
http://linked.open...vavai/riv/typAkce	CST - Celostátní
http://linked.open.../riv/zahajeniAkce	2003-09-24 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Uncertainty methods in theoretical cybernetics: system identification, information processing, decision-making, and control
number of pages	8 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Vysoké učení technické v Brně
https://schema.org/isbn	80-214-2471-0

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