The paper is focused on rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using combination of the Xilinx System Generator (XSG) and Handel-C is rewieved. A design flow to minimize HDL coding is considered.
The paper is focused on rapid prototyping for FPGA using the high-level environment of MATLAB/Simulink. An approach using combination of the Xilinx System Generator (XSG) and Handel-C is rewieved. A design flow to minimize HDL coding is considered. (en)