The Viterbi decoder is presented as the special computing system and the implementations by FPGA target are discussed. The performance of the ECC systen is evaluated, and synthesized. The various versions are compared and some of them are described in details.
The Viterbi decoder is presented as the special computing system and the implementations by FPGA target are discussed. The performance of the ECC systen is evaluated, and synthesized. The various versions are compared and some of them are described in details. (en)