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Description
| - The reliability issue, including aging processes in modern devices with very fine structures and utilizing programmable technologies, being applied in high-performance or dependable systems in various safety, automotive or space applications, is sometimes very difficult to predict, measure or watch. The task is well-mastered in the world of ASIC, the situation is slightly different for FPGA devices. Modern FPGA devices incorporate number of true dual-port memory blocks with 8-T cells, hence offering new options. However, such blocks are typically used for data storage and processing purposes. This paper presents a new way of utilization of the RAM block (BRAM) for the delay fault detection purposes. The BRAM and a simple controller log risky transitions or delay fault events and may positively affect the overall reliability of the device as well as all the system.
- The reliability issue, including aging processes in modern devices with very fine structures and utilizing programmable technologies, being applied in high-performance or dependable systems in various safety, automotive or space applications, is sometimes very difficult to predict, measure or watch. The task is well-mastered in the world of ASIC, the situation is slightly different for FPGA devices. Modern FPGA devices incorporate number of true dual-port memory blocks with 8-T cells, hence offering new options. However, such blocks are typically used for data storage and processing purposes. This paper presents a new way of utilization of the RAM block (BRAM) for the delay fault detection purposes. The BRAM and a simple controller log risky transitions or delay fault events and may positively affect the overall reliability of the device as well as all the system. (en)
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Title
| - Delay-fault run-time XOR-less aging detection unit using BRAM in modern FPGAs
- Delay-fault run-time XOR-less aging detection unit using BRAM in modern FPGAs (en)
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skos:prefLabel
| - Delay-fault run-time XOR-less aging detection unit using BRAM in modern FPGAs
- Delay-fault run-time XOR-less aging detection unit using BRAM in modern FPGAs (en)
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skos:notation
| - RIV/46747885:24220/12:#0002014!RIV13-MSM-24220___
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http://linked.open...avai/predkladatel
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/46747885:24220/12:#0002014
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...v/mistoKonaniAkce
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http://linked.open...i/riv/nazevZdroje
| - Proceedings of the Biennial Baltic Electronics Conference, BEC
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...UplatneniVysledku
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http://linked.open...iv/tvurceVysledku
| - Plíva, Zdeněk
- Pfeifer, Petr
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http://linked.open...vavai/riv/typAkce
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http://linked.open.../riv/zahajeniAkce
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issn
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number of pages
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http://bibframe.org/vocab/doi
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http://purl.org/ne...btex#hasPublisher
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http://localhost/t...ganizacniJednotka
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