About: Fast Just-In-Time Translated Simulator for ASIP Design

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	The fast and accurate processor simulator is an essential tool for effective design of modern high-performance application-specific instruction set processors. The nowadays trend of ASIP design is focused on automatic simulator generation based on a processor description in an architecture description language. The simulator is used for testing and validation of designed processor or target application. Furthermore, the simulator can produce the profiling information. This information can aid design space exploration and the processor and target application optimization. In this paper, we present the concept of automatically generated just-in-time translated simulator with the profiling capabilities. This simulator is very fast, and it is generated in a short time. It can be even used for simulation of special applications, such as applications with self-modifying code or applications for systems with external memories. The experimental results can be found at the end of the paper. The fast and accurate processor simulator is an essential tool for effective design of modern high-performance application-specific instruction set processors. The nowadays trend of ASIP design is focused on automatic simulator generation based on a processor description in an architecture description language. The simulator is used for testing and validation of designed processor or target application. Furthermore, the simulator can produce the profiling information. This information can aid design space exploration and the processor and target application optimization. In this paper, we present the concept of automatically generated just-in-time translated simulator with the profiling capabilities. This simulator is very fast, and it is generated in a short time. It can be even used for simulation of special applications, such as applications with self-modifying code or applications for systems with external memories. The experimental results can be found at the end of the paper. (en)
Title	Fast Just-In-Time Translated Simulator for ASIP Design Fast Just-In-Time Translated Simulator for ASIP Design (en)
skos:prefLabel	Fast Just-In-Time Translated Simulator for ASIP Design Fast Just-In-Time Translated Simulator for ASIP Design (en)
skos:notation	RIV/00216305:26230/11:PU96020!RIV12-TA0-26230___
http://linked.open...avai/predkladatel	Fakulta informačních technologií
http://linked.open...avai/riv/aktivita	P S Z
http://linked.open...avai/riv/aktivity	P(7H10014), P(FR-TI1/038), P(GD102/09/H042), P(TA01010667), S, Z(MSM0021630528)
http://linked.open...vai/riv/dodaniDat	2012
http://linked.open...aciTvurceVysledku	Přikryl, Zdeněk Křoustek, Jakub Hruška, Tomáš Kolář, Dušan
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	199365
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/11:PU96020
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	Architecture description languages, simulation, testing, application-specific instruction set processors (en)
http://linked.open.../riv/klicoveSlovo	Architecture description languages simulation testing application-specific instruction set processors
http://linked.open...ontrolniKodProRIV	[0A8597DB16C5]
http://linked.open...v/mistoKonaniAkce	Cottbus
http://linked.open...i/riv/mistoVydani	Cottbus
http://linked.open...i/riv/nazevZdroje	14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	4 (xsd:int)
http://linked.open...cetTvurcuVysledku	4 (xsd:int)
http://linked.open...vavai/riv/projekt	Mathematical and Engineering Approaches to Developing Reliable and Secure Concurrent and Distributed Computer Systems System for Support of Platform Independent Malware Analysis in Executable Files. Smart Multicore Embedded SYstems System for Programming and Realization of Embedded Systems
http://linked.open...UplatneniVysledku	2011
http://linked.open...iv/tvurceVysledku	Hruška, Tomáš Kolář, Dušan Křoustek, Jakub Přikryl, Zdeněk
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2011-04-13 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Výzkum informačních technologií z hlediska bezpečnosti
number of pages	4 (xsd:int)
http://purl.org/ne...btex#hasPublisher	IEEE Computer Society
https://schema.org/isbn	978-1-4244-9753-9
http://localhost/t...ganizacniJednotka	26230
is http://linked.open...avai/riv/vysledek of	Fast Just-In-Time Translated Simulator for ASIP Design Fast Just-In-Time Translated Simulator for ASIP Design

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