About: Evolutionary Design of Gate-Level Polymorphic Digital Circuits

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	A method for the evolutionary design of polymorphic digital combinational circuits is proposed. These circuits are able to perform different functions (e.g. to switch between the adder and multiplier) only as a consequence of the change of a sensitive variable, which can be a power supply voltage, temperature etc. However, multiplexing of standard solutions is not utilized. The evolved circuits exhibit a unique structure composed of multifunctional polymorphic gates considered as building blocks instead. In many cases the area-efficient solutions were discovered for typical tasks of the digital design. We demonstrated that it is useful to combine polymorphic gates and conventional gates in order to obtain the required functionality.<br> A method for the evolutionary design of polymorphic digital combinational circuits is proposed. These circuits are able to perform different functions (e.g. to switch between the adder and multiplier) only as a consequence of the change of a sensitive variable, which can be a power supply voltage, temperature etc. However, multiplexing of standard solutions is not utilized. The evolved circuits exhibit a unique structure composed of multifunctional polymorphic gates considered as building blocks instead. In many cases the area-efficient solutions were discovered for typical tasks of the digital design. We demonstrated that it is useful to combine polymorphic gates and conventional gates in order to obtain the required functionality.<br> (en)
Title	Evolutionary Design of Gate-Level Polymorphic Digital Circuits Evolutionary Design of Gate-Level Polymorphic Digital Circuits (en)
skos:prefLabel	Evolutionary Design of Gate-Level Polymorphic Digital Circuits Evolutionary Design of Gate-Level Polymorphic Digital Circuits (en)
skos:notation	RIV/00216305:26230/05:PU55717!RIV10-GA0-26230___
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(GP102/03/P004)
http://linked.open...vai/riv/dodaniDat	2010
http://linked.open...aciTvurceVysledku	Sekanina, Lukáš
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta informačních technologií
http://linked.open...dnocenehoVysledku	520830
http://linked.open...ai/riv/idVysledku	RIV/00216305:26230/05:PU55717
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	evolutionary design, digital circuits, polymorphic electronics (en)
http://linked.open.../riv/klicoveSlovo	evolutionary design polymorphic electronics digital circuits
http://linked.open...ontrolniKodProRIV	[1D36220E8176]
http://linked.open...v/mistoKonaniAkce	Lausanne, Switzerland
http://linked.open...i/riv/mistoVydani	Berlin
http://linked.open...i/riv/nazevZdroje	Applications of Evolutionary Computation
http://linked.open...in/vavai/riv/obor	JC
http://linked.open...ichTvurcuVysledku	1 (xsd:int)
http://linked.open...cetTvurcuVysledku	1 (xsd:int)
http://linked.open...vavai/riv/projekt	Evolvable hardware based applications design methods
http://linked.open...UplatneniVysledku	2005
http://linked.open...iv/tvurceVysledku	Sekanina, Lukáš
http://linked.open...vavai/riv/typAkce	WRD - Světová
http://linked.open.../riv/zahajeniAkce	2005-03-30 (xsd:date)
number of pages	10 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Springer-Verlag
https://schema.org/isbn	978-3-540-25396-9
http://localhost/t...ganizacniJednotka	26230
is http://linked.open...avai/riv/vysledek of	Evolutionary Design of Gate-Level Polymorphic Digital Circuits

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