About: Timed Automata Approach to Distributed and Fault Tolerant System Verification

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	This article deals with a distributed, fault-tolerant real-time application modeling by timed automata. The application under consideration consists of several processors communicating via Controller Area Network (CAN); each processor executes an application that consists of fault-tolerant tasks running under an operating system (e.g. OSEK) and using inter-task synchronization primitives. For such system, the model checking tool (e.g. UPAALL) can be used to verify complex time and logical properties formalized as a safety or bounded liveness properties (e.g. end-to-end response time considering occurrence of a fault, state reachability).The main contribution of this paper is that the proposed model reduces size of the state-space by sharing clocks measuring the execution time of tasks and simply incorporates fault-tolerant features of the application. This article deals with a distributed, fault-tolerant real-time application modeling by timed automata. The application under consideration consists of several processors communicating via Controller Area Network (CAN); each processor executes an application that consists of fault-tolerant tasks running under an operating system (e.g. OSEK) and using inter-task synchronization primitives. For such system, the model checking tool (e.g. UPAALL) can be used to verify complex time and logical properties formalized as a safety or bounded liveness properties (e.g. end-to-end response time considering occurrence of a fault, state reachability).The main contribution of this paper is that the proposed model reduces size of the state-space by sharing clocks measuring the execution time of tasks and simply incorporates fault-tolerant features of the application. (en)
Title	Timed Automata Approach to Distributed and Fault Tolerant System Verification Timed Automata Approach to Distributed and Fault Tolerant System Verification (en)
skos:prefLabel	Timed Automata Approach to Distributed and Fault Tolerant System Verification Timed Automata Approach to Distributed and Fault Tolerant System Verification (en)
skos:notation	RIV/68407700:21230/05:00110220!RIV14-MSM-21230___
http://linked.open...avai/riv/aktivita	P
http://linked.open...avai/riv/aktivity	P(1M0567)
http://linked.open...vai/riv/dodaniDat	2014
http://linked.open...aciTvurceVysledku	Hanzálek, Zdeněk Waszniowski, Libor Krákora, Jan
http://linked.open.../riv/druhVysledku	O - Ostatní výsledky nezařaditelné do žádného z výše uvedených druhů výsledku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	České vysoké učení technické v Praze / Fakulta elektrotechnická
http://linked.open...dnocenehoVysledku	546824
http://linked.open...ai/riv/idVysledku	RIV/68407700:21230/05:00110220
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	Controller area network; Distributed system; Model checking; Real-Time system; Timed automata (en)
http://linked.open.../riv/klicoveSlovo	Model checking Timed automata Distributed system Controller area network Real-Time system
http://linked.open...ontrolniKodProRIV	[E2F56D3D2C47]
http://linked.open...in/vavai/riv/obor	JD
http://linked.open...ichTvurcuVysledku	3 (xsd:int)
http://linked.open...cetTvurcuVysledku	3 (xsd:int)
http://linked.open...vavai/riv/projekt	Centre for Applied Cybernetics
http://linked.open...UplatneniVysledku	2005
http://linked.open...iv/tvurceVysledku	Hanzálek, Zdeněk Waszniowski, Libor Krákora, Jan
http://localhost/t...ganizacniJednotka	21230

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