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rdf:type
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Description
| - An FPGA implementation of the FI-CMA algorithm using the Virtex-E and Virtex-II devices is presented. The algorithm consists of two parts: one, performing batch-QR decomposition of the data matrix, and second, used for an iterative equalizer optimization, using the columns of the Q-matrix as input. The resource reuse and minimization of the total latency have been emphasized. Logarithmic arithmetic library has been used for floating point calculations, required in algorithm.
- An FPGA implementation of the FI-CMA algorithm using the Virtex-E and Virtex-II devices is presented. The algorithm consists of two parts: one, performing batch-QR decomposition of the data matrix, and second, used for an iterative equalizer optimization, using the columns of the Q-matrix as input. The resource reuse and minimization of the total latency have been emphasized. Logarithmic arithmetic library has been used for floating point calculations, required in algorithm. (en)
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Title
| - FPGA implementation of Finite Interval CMA
- FPGA implementation of Finite Interval CMA (en)
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skos:prefLabel
| - FPGA implementation of Finite Interval CMA
- FPGA implementation of Finite Interval CMA (en)
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skos:notation
| - RIV/67985556:_____/05:00411312!RIV10-AV0-67985556
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
| - P(1ET300750402), Z(AV0Z10750506)
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/67985556:_____/05:00411312
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
| - CMA algorithm; FPGA; data matrix (en)
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...v/mistoKonaniAkce
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http://linked.open...i/riv/mistoVydani
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http://linked.open...i/riv/nazevZdroje
| - Proceedings of the first annual IEEE BENELUX/DSP Valley Signal Processing Symposium. SPS-DARTS 2005
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...vavai/riv/projekt
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http://linked.open...UplatneniVysledku
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http://linked.open...iv/tvurceVysledku
| - Schier, Jan
- Heřmánek, Antonín
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http://linked.open...vavai/riv/typAkce
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http://linked.open.../riv/zahajeniAkce
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http://linked.open...n/vavai/riv/zamer
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number of pages
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http://purl.org/ne...btex#hasPublisher
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https://schema.org/isbn
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