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Description
| - Many algorithms have been proposed to accelerate regular expression matching via mapping of a nondeterministic finite automaton into a circuit implemented in an FPGA. These algorithms exploit unique features of the FPGA to achieve high throughput. On the other hand the FPGA poses a limit on the number of regular expressions by its limited resources. In this paper, we investigate applicability of NFA reduction techniques - a formal aparatus to reduce the number of states and transitions in NFA prior to its mapping into FPGA. The paper presents several NFA reduction techniques, each with a different reduction power and time complexity. The evaluation utilizes regular expressions from Snort and L7 decoder. The best NFA reduction algorithms achieve more than 66% reduction in the number of states for a Snort ftp module. Such a reduction translates directly into 66% LUT and FF saving in the FPGA.
- Many algorithms have been proposed to accelerate regular expression matching via mapping of a nondeterministic finite automaton into a circuit implemented in an FPGA. These algorithms exploit unique features of the FPGA to achieve high throughput. On the other hand the FPGA poses a limit on the number of regular expressions by its limited resources. In this paper, we investigate applicability of NFA reduction techniques - a formal aparatus to reduce the number of states and transitions in NFA prior to its mapping into FPGA. The paper presents several NFA reduction techniques, each with a different reduction power and time complexity. The evaluation utilizes regular expressions from Snort and L7 decoder. The best NFA reduction algorithms achieve more than 66% reduction in the number of states for a Snort ftp module. Such a reduction translates directly into 66% LUT and FF saving in the FPGA. (en)
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Title
| - NFA Reduction for Regular Expressions Matching Using FPGA
- NFA Reduction for Regular Expressions Matching Using FPGA (en)
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skos:prefLabel
| - NFA Reduction for Regular Expressions Matching Using FPGA
- NFA Reduction for Regular Expressions Matching Using FPGA (en)
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skos:notation
| - RIV/00216305:26230/13:PU107071!RIV14-MSM-26230___
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http://linked.open...avai/riv/aktivita
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http://linked.open...avai/riv/aktivity
| - P(ED1.1.00/02.0070), S, Z(MSM0021630528)
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http://linked.open...vai/riv/dodaniDat
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http://linked.open...aciTvurceVysledku
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http://linked.open.../riv/druhVysledku
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http://linked.open...iv/duvernostUdaju
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http://linked.open...titaPredkladatele
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http://linked.open...dnocenehoVysledku
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http://linked.open...ai/riv/idVysledku
| - RIV/00216305:26230/13:PU107071
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http://linked.open...riv/jazykVysledku
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http://linked.open.../riv/klicovaSlova
| - FPGA, NFA, Reduction, Regular expressions matching (en)
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http://linked.open.../riv/klicoveSlovo
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http://linked.open...ontrolniKodProRIV
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http://linked.open...v/mistoKonaniAkce
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http://linked.open...i/riv/mistoVydani
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http://linked.open...i/riv/nazevZdroje
| - Proceedings of the 2013 International Conference on Field Programmable Technology
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http://linked.open...in/vavai/riv/obor
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http://linked.open...ichTvurcuVysledku
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http://linked.open...cetTvurcuVysledku
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http://linked.open...vavai/riv/projekt
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http://linked.open...UplatneniVysledku
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http://linked.open...iv/tvurceVysledku
| - Kořenek, Jan
- Žádník, Martin
- Košař, Vlastimil
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http://linked.open...vavai/riv/typAkce
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http://linked.open.../riv/zahajeniAkce
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http://linked.open...n/vavai/riv/zamer
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number of pages
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http://purl.org/ne...btex#hasPublisher
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https://schema.org/isbn
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http://localhost/t...ganizacniJednotka
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