About: Spartan-3 Development Board for Education

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An Entity of Type : http://linked.opendata.cz/ontology/domain/vavai/Vysledek, within Data Space : linked.opendata.cz associated with source document(s)

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	This paper describes an introduction into the gate arrays FPGA. Spartan-3 development board was designed. Spartan-3 development board will be used to teach design of logic circuits and VHDL language. This paper describes all components, which are controlled by FPGA Spartan-3. This paper describes an introduction into the gate arrays FPGA. Spartan-3 development board was designed. Spartan-3 development board will be used to teach design of logic circuits and VHDL language. This paper describes all components, which are controlled by FPGA Spartan-3. (en) Článek popisuje vývojovou desku s obvodem FPGA Spartan-3 určenou pro výuku v předmětu Návrh digitálních integrovaných obvodů a jazyk VHDL. (cs)
Title	Spartan-3 Development Board for Education Spartan-3 Development Board for Education (en) Vývojová deska s obvodem SPARTAN-3 (cs)
skos:prefLabel	Spartan-3 Development Board for Education Spartan-3 Development Board for Education (en) Vývojová deska s obvodem SPARTAN-3 (cs)
skos:notation	RIV/00216305:26220/05:PU51428!RIV06-GA0-26220___
http://linked.open.../vavai/riv/strany	407-410
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(GD102/03/H105), Z(MSM0021630503)
http://linked.open...vai/riv/dodaniDat	2006
http://linked.open...aciTvurceVysledku	Fujcik, Lukáš Brzobohatý, Jaromír Bohrn, Marek
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta elektrotechniky a komunikačních technologií
http://linked.open...dnocenehoVysledku	543776
http://linked.open...ai/riv/idVysledku	RIV/00216305:26220/05:PU51428
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	programable logic device, VHDL, FPGA (en)
http://linked.open.../riv/klicoveSlovo	VHDL FPGA programable logic device
http://linked.open...ontrolniKodProRIV	[EAF2BEE0A194]
http://linked.open...v/mistoKonaniAkce	Brno
http://linked.open...i/riv/mistoVydani	Brno
http://linked.open...i/riv/nazevZdroje	EDS'05 IMAPS CS INTERNATIONAL CONFERENCE PROCEEDINGS
http://linked.open...in/vavai/riv/obor	JA
http://linked.open...ichTvurcuVysledku	3 (xsd:int)
http://linked.open...cetTvurcuVysledku	3 (xsd:int)
http://linked.open...vavai/riv/projekt	Modern methods of electronic circuit analysis, design and applications
http://linked.open...UplatneniVysledku	2005
http://linked.open...iv/tvurceVysledku	Fujcik, Lukáš Bohrn, Marek Brzobohatý, Jaromír
http://linked.open...vavai/riv/typAkce	CST - Celostátní
http://linked.open.../riv/zahajeniAkce	2005-09-15 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Nové trendy v mikroelektronických systémech a nanotechnologiích (MIKROSYN)
number of pages	4 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Ing. Zdeněk Novotný CSc.
https://schema.org/isbn	80-214-2990-9
http://localhost/t...ganizacniJednotka	26220

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