About: Modeling and Design of a Novel Architecture of Sigma-Delta Converter for Sensor Measurement

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rdf:type	skos:Concept http://linked.opendata.cz/ontology/domain/vavai/Vysledek
Description	Článek popisuje novou architekturu převodníku sigma-delta vyššího řádu pro senzorové měření. Převodník s dvoustupňovým kvantovacím procesem je využit jako vícebitový kvantovací obvod.Prezentována acrhitektura byla namodelována v prostředí Matlab Simulink.V článku je také prezentován návrh decimačního filtru pro danou architekturu modulátoru sigma-delta. (cs) This paper presents a novel architecture of high-order single-stage sigma-delta (ΣΔ) converter for sensor measurement. The two-step quantization technique was utilized to design of novel architecture of ΣΔ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a ΣΔ modulator. Parameters of decimation filter are derived from the specifications of the overall ΣΔ modulator. The proposed architecture of switched-capacitor (SC) ΣΔ modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). This paper presents a novel architecture of high-order single-stage sigma-delta (ΣΔ) converter for sensor measurement. The two-step quantization technique was utilized to design of novel architecture of ΣΔ modulator. The time steps are interleaved to achieve resolution improvement without decreasing of conversion speed. This technique can be useful for low oversampling ratio. The novel architecture was designed to obtain high dynamic range of input signal, high signal-to-noise ratio and high reliability. This paper describes steps involved in a new VHDL design of a decimation filter for a ΣΔ modulator. Parameters of decimation filter are derived from the specifications of the overall ΣΔ modulator. The proposed architecture of switched-capacitor (SC) ΣΔ modulator was simulated with nonidealities blocks, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). (en)
Title	Modeling and Design of a Novel Architecture of Sigma-Delta Converter for Sensor Measurement Modelování a návrh nové architektury modulátoru sigma-delta pro senzorové měření. (cs) Modeling and Design of a Novel Architecture of Sigma-Delta Converter for Sensor Measurement (en)
skos:prefLabel	Modeling and Design of a Novel Architecture of Sigma-Delta Converter for Sensor Measurement Modelování a návrh nové architektury modulátoru sigma-delta pro senzorové měření. (cs) Modeling and Design of a Novel Architecture of Sigma-Delta Converter for Sensor Measurement (en)
skos:notation	RIV/00216305:26220/05:PU51427!RIV07-GA0-26220___
http://linked.open.../vavai/riv/strany	148-153
http://linked.open...avai/riv/aktivita	P Z
http://linked.open...avai/riv/aktivity	P(GA102/05/0869), P(GD102/03/H105), Z(MSM0021630503)
http://linked.open...vai/riv/dodaniDat	2007
http://linked.open...aciTvurceVysledku	Fujcik, Lukáš Vrba, Radimír Mougel, Thibault
http://linked.open.../riv/druhVysledku	D - Článek ve sborníku
http://linked.open...iv/duvernostUdaju	S - Úplné a pravdivé údaje nepodléhající ochraně podle zvláštních právních předpisů
http://linked.open...titaPredkladatele	Vysoké učení technické v Brně / Fakulta elektrotechniky a komunikačních technologií
http://linked.open...dnocenehoVysledku	530555
http://linked.open...ai/riv/idVysledku	RIV/00216305:26220/05:PU51427
http://linked.open...riv/jazykVysledku	eng - angličtina
http://linked.open.../riv/klicovaSlova	sigma-delta modulation, decimation filter, modeling (en)
http://linked.open.../riv/klicoveSlovo	modeling decimation filter sigma-delta modulation
http://linked.open...ontrolniKodProRIV	[EE28D9A744A6]
http://linked.open...v/mistoKonaniAkce	Brno
http://linked.open...i/riv/mistoVydani	Brno
http://linked.open...i/riv/nazevZdroje	EDS'05 IMAPS CS INTERNATIONAL CONFERENCE PROCEEDINGS
http://linked.open...in/vavai/riv/obor	JA
http://linked.open...ichTvurcuVysledku	3 (xsd:int)
http://linked.open...cetTvurcuVysledku	3 (xsd:int)
http://linked.open...vavai/riv/projekt	Modern methods of electronic circuit analysis, design and applications New principles of intergrated low-voltage and low-power AD converters in sub-micron technologies
http://linked.open...UplatneniVysledku	2005
http://linked.open...iv/tvurceVysledku	Fujcik, Lukáš Vrba, Radimír Mougel, Thibault
http://linked.open...vavai/riv/typAkce	CST - Celostátní
http://linked.open.../riv/zahajeniAkce	2005-09-15 (xsd:date)
http://linked.open...n/vavai/riv/zamer	Nové trendy v mikroelektronických systémech a nanotechnologiích (MIKROSYN)
number of pages	6 (xsd:int)
http://purl.org/ne...btex#hasPublisher	Ing. Zdeněk Novotný CSc.
https://schema.org/isbn	80-214-2990-9
http://localhost/t...ganizacniJednotka	26220

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